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Espressif Systems /ESP32-H2 /PCR /CTRL_CLK_OUT_EN

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Interpret as CTRL_CLK_OUT_EN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLK8_OEN)CLK8_OEN 0 (CLK16_OEN)CLK16_OEN 0 (CLK32_OEN)CLK32_OEN 0 (CLK_ADC_INF_OEN)CLK_ADC_INF_OEN 0 (CLK_DFM_INF_OEN)CLK_DFM_INF_OEN 0 (CLK_SDM_MOD_OEN)CLK_SDM_MOD_OEN 0 (CLK_XTAL_OEN)CLK_XTAL_OEN

Description

CLK_OUT_EN configuration register

Fields

CLK8_OEN

Set 1 to enable 8m clock
CLK16_OEN

Set 1 to enable 16m clock
CLK32_OEN

Set 1 to enable 32m clock
CLK_ADC_INF_OEN

Reserved
CLK_DFM_INF_OEN

Reserved
CLK_SDM_MOD_OEN

Reserved
CLK_XTAL_OEN

Set 1 to enable xtal clock

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data